The following discussion of the art of the plastic packaging of electrical components, especially of integrated circuits is, in part, summarized from Chapter 18, "Packaging" in Microchip Fabrication, pp. 539-586, Peter van Zant, McGraw-Hill, 1997. This background information is herewith incorporated by reference.
After wafer fabrication, semiconductor chips undergo several processes to prepare the chips for eventual use. By way of illustration, but not limitation, some of these processes include: backside preparation; die separation; die pick; inspection; die attach; wire bonding; pre-seal inspection; package sealing; plating; trimming; marking; and final testing. Many of these processes can be categorized as part of the packaging, or enclosure process.
One form of enclosure common to semiconductor or integrated circuit (IC) manufacture is the molded epoxy package. Epoxy packages perform the four basic requirements of an electronic package for the circuit chip, or die ("chip") they house: they support a substantial lead system for connecting the device to the system component which will utilize it; they provide physical protection of the device from breakage, contamination and abuse; they protect the device from environmental hazards such as chemicals, moisture and gasses which could interfere with device performance; and they provide a path for dissipating the heat generated by the functioning of the device. Epoxy packaging presents several major advantages over some other device packaging technologies: it is light in weight, low in cost, and high in manufacturing efficiency.
One method of epoxy packaging of semiconductor devices is illustrated in prior art FIGS. 1 and 2. Having reference to those figures, this methodology is explained as follows: after die separation (and in some cases, after some of the previously mentioned steps, the die, 1', concentric with device 1, is attached and bonded to a composite lead frame, 2. In the exemplar here presented, lead frame 2 includes horizontal rails, 5, and vertical tie bars, 7, and provides a plurality of lead systems for connecting to the semiconductor dice (not shown), thereby producing the useful individual device. In this example there are provided a plurality of individual device lead frames 2, each having mounted thereon a further plurality of dice, 1'. After die mounting, the lead frames having the dice mounted thereon are often given some form of pre-seal inspection.
After the pre-seal inspection, the lead frames are transferred to a molding apparatus. Commonly used in this procedure is a transfer molding process which encapsulates and surrounds each of the dice and at least a portion of the lead frame assembly with a plastic encapsulant, or molding compound. Commonly utilized molding compounds include, but are not limited to: epoxies, monomers, polymers, and other resins. In the exemplar here presented, a silica-filled epoxy is utilized as the molding compound, or encapsulant.
The lead frames are placed in a mold, here a two-part mold consisting of mold halves 20 and 21. At least one mold half, often the bottom, has formed therein a gate, 10. The mold halves are clamped together, typically with some force, and often a portion of the lead frames, 2, completes the mold cavity, 16. The vent, 24, which provides a path for escaping air during the transfer molding process, is typically filled with the encapsulant during that operation.
After the mold has been clamped about lead frames 2 and dice 1', the ram assembly of the molding apparatus is charged with a quantity of molding compound, for instance as a homogenous pellet, through sprues 14. A prior art homogenous molding compound pellet, 60, comprising a quantity of silica-filled epoxy incorporating all the adjuncts desired for the package, is shown at prior art FIG. 6. The epoxy material may have been previously softened by means of heating or chemical reaction. The transfer molding apparatus then induces pressure, usually by means of a ram in operative combination with sprue 14, on the molten, viscous epoxy and it flows from sprues 14 through a series of runners, 12, through tapered sections 11 of gates 10, and thence into mold cavities 16. As the ram (not shown) continues to apply pressure to the mass of liquid epoxy, it is then forced around the integrated circuit dice, 1', encapsulating the dice and forming the individual packages, or devices, 1.
After the epoxy is at least partially set, the molds are separated, and the lead frame assembly is removed therefrom. This assembly may then be further cured by an oven or other heat means. Following final curing, the packages undergo further processing including, but not limited to: plating; runner removal; de-flashing; marking; and final testing. The finished packaged component is then ready for use.
Referring now to FIG. 3, a prior art plastic resin encapsulated integrated circuit device, 1, formed in accordance with the previously discussed process is shown. Device 1 comprises an integrated circuit (IC) device, 1', for instance a silicon IC chip. Chip 1' is bonded to a copper die paddle 30, in this exemplar by means of a layer of silver plating, 32. Device 1 further comprises at least one, and more generally a plurality of leads 34. Leads 34 are electrically connected in this example by means of wire bonds 36. Wire bonds 36 are typically first bonded to the correct chip bonding pad and then spanned to an inner end of lead 34. Lead 34 is commonly, but not exclusively, manufactured from copper, and may include a layer of plating, for instance silver plating 38, to increase the reliability of the wire bonding process. Leads 34 and die paddle 30 are typically formed utilizing the lead frame technology previously discussed. The previously discussed components are encapsulated, in this prior art example, by means of a homogeneous mass of silica-charged epoxy, 40, in the manner hereafter discussed.
Prior art molding compounds, for instance the homogenous pellet shown in prior art FIG. 6, typically consist of a homogeneous mixture of silica, epoxy (whether plain or brominated), and one or more molding compound adjuncts including, but not necessarily limited to: flame retardants, including antimony trioxide; cross-linking agents; inhibitors; ionic getters; and mold release agents.
Transfer molding compounds, including the previously discussed epoxy molding compounds commonly used for the encapsulation of silicon IC devices, have variable adhesion to the several elements encapsulated within the package. In particular, adhesion of prior art molding compounds to the silver plated lead frames, as well as to the gold bonding wires, is poor. This is partially due to the fact that both gold and silver are substantially noble metals, which is to say that neither is particularly chemically reactive and neither forms a tenacious oxide. The biggest part of the problem, however, is due to the composition of the molding compound itself, and most particularly to the homogenous inclusion of molding compound adjuncts, including mold release agents therein.
Release agents typically include waxes (commonly carnauba or its synthetic equivalent) and stearates (commonly as the calcium or zinc salts of stearic acid). These release agents are incorporated into molding compounds to permit the encapsulated IC to be removed easily from its mold. The mold release compounds are typically incorporated into the molding compound, as the topical application of the mold release compound to the mold itself for each "shot" would be time-consuming, messy, and potentially incomplete. Naturally, these waxes and stearates, whose typical melting points are on the order of 80.degree. to 180.degree. C., prevent sticking of the molding compound to the mold. Their presence in the molding compound, however, has a negative effect: they impede the adhesion of the molding compound to the lead frame and to the silicon chip as well.
A commonly used fire retardant system in encapsulated semiconductor manufacture is the inclusion in the molding compound of antimony trioxide and brominated epoxy. The use of flame retardants is mandated by the fact that some encapsulated electronic devices have in past generated sufficient heat whereby the flash point of the molding compound has been reached and a fire ensued. In the event that the encapsulant containing this fire retardant system reaches its flash temperature, antimony trioxide and bromide combine to form antimony tribromide, a dense, heavy, flame retardant gas, which gas precludes the flames' spread. Unfortunately, both of these flame retardant materials, as well as other known flame retardant materials, when brought into contact with an encapsulated semiconductor device's wire bonds to degrade the wire bond's reliability. This degradation typically comes as a result of the chemicals causing a failure of the inter-metallic bond between the bonding wire and at least one of the lead and/or the bonding pad on the chip.
The preceding discussion presents a broad overview of the plastic packaging of electrical components, as practiced by others having ordinary skill in the art. Details of one example of such a molding process can be found in U.S. Pat. No. 4,697,784 to Schmid.
Homogenous molding resins were never intended to provide a hermetic seal around the plastic encapsulated IC chip, but they are expected to preserve the initial or time zero (pre-stress) properties and functionality thereof. Indeed, most authorities on IC packaging refer to the use of epoxy resins or copolymers, including silicones, as "non-hermetic". This gives rise to a first class of problems associated with current homogeneous molding compound technology, relating to the unwanted adsorption of water by the packaged device. A second class of problems, which may or may not be exacerbated by non-hermetic sealing of the device results from the chemical and metallurgical interactions between at least some of the integrated circuit components and additives, or adjuncts in the homogenous encapsulant.
The fact that the previously discussed plastic resin encapsulation methods and materials do not provide a perfectly hermetic seal for the enclosed electronic component has given rise to a number of technical imperfections. One such imperfection is the internal delamination which can occur within a plastic-encapsulated electronic device, especially an integrated circuit, after the device adsorbs an unwanted degree of humidity or moisture. When such a device contained adsorbed or entrained water is exposed to rapid heating during assembly or component use, particularly use in surface mount packaging technology, the heat generated when the device is powered can cause the moisture entrapped within the package to flash to steam, resulting in a rapid internal package delamination. This delamination can disrupt normal IC function or connection with the printed circuit board. Internal delamination can also disturb the stress and strain distribution in the package, perhaps thereby leading to package fracture, disruption of proper heat dissipation and impaired performance in high humidity environments.
Normal internal delamination may be undetectable from external inspection, and may only be detected when the device fails. In its more severe form, the package may expand and even rupture due to hydraulic expansion. This is second technical imperfection, sometimes referred to as the "popcorn" phenomenon, and is most commonly found in surface mount technology devices.
The problems associated with entrained moisture within encapsulated IC devices are well known, and their regulation and/or elimination is the subject of a number of technical standards promulgated by the Joint Electron Device Engineering Council (JEDEC) of the International Electronics Association (IEA). JEDEC Standards JESD22A103 and JESD22A104 set forth a number of standard levels which define levels of entrained moisture or humidity.
Because of their inherently superior manufacturability, IC devices meeting the low entrained moisture requirements of a JESD22A104 Level 1 device are potentially more reliable than devices meeting lower, less stringent standards. Level 1 devices are also more commercially valuable than devices which can only meet a lower standard. Accordingly, IC manufacturers currently go to extreme lengths to provide Level 1 devices wherever possible.
Measures undertaken by manufacturers to provide their customers JEDEC Level 1 components include the practice commonly known as "bake and bag". This practice consists of heating the finished components to a given temperature for a given period of time in order to dry them out (thereby ensuring at least temporary protection against "popcorn" and delamination), and then immediately sealed in hermetically sealed containers with a desiccant. In this manner the package, at least as shipped from the manufacturer, meets customer expectations.
JEDEC Level 1 parts are greatly preferred by IC assemblers as the moisture performance rating ("popcorn invulnerable") implies an unlimited lifetime on the surface mount technology floor device, so the assembler need not watch the clock nor re-bake the IC devices if too much time has elapsed from the opening of the bag until the assembly of the device into the apparatus into which it is incorporated.
The work of others to overcome the vulnerability of plastic-encapsulated electronic devices to retaining sufficient entrained moisture to preclude level 1 certification has centered on the search for a "magic combination" of an ideal reduced-hygroscopicity homogenous molding compound coupled with a specific process technology using the compound in an ideal manner, which combination results in the production of packaged device having reduced vulnerability to attack by humidity. The reality, unfortunately, is that all such combinations to date have fallen short of desired performance levels. This is particularly true for more massive IC packages, and so the "fall back" position currently utilized by many manufacturers is to characterize the JEDEC performance level as comprehensively as possible and inform the user of that level, so that the user can manage his or her processes, such that popcorn failures are reduced.
In summary, the current situation is largely a proposition of "build it and then characterize how good or bad the chip is". There is currently no means available reliably to ensure that substantially all the integrated circuits encapsulated during manufacture meet JEDEC Level 1 standards, thereby preventing internal package delamination, and susceptibility of the device to popcorn failure.
The second broad class of problems with current homogenous molding compound technology is those caused by the flame retardants in the molding compounds. A commonly used flame retardant system in encapsulated semiconductor manufacture is the inclusion in the molding compound of antimony trioxide and brominated epoxy. The use of flame retardants is mandated by the fact that some encapsulated electronic devices have in past generated sufficient heat whereby the flash point of the molding compound has been reached and a fire ensued. In the event that the encapsulant containing this flame retardant system reaches its flash temperature, antimony trioxide and brominated epoxy combine to form antimony tribromide, a dense, heavy, flame retardant gas, which gas precludes the flames' spread.
The use of the previously discussed flame retardant materials, as well as other known flame retardant materials, gives rise to the second discussed problem with current homogenous molding compounds. Some of these flame retardant chemicals, especially brominated epoxy, when brought into contact with an encapsulated semiconductor device's wire bonds tends to degrade the wire bond's reliability. This degradation typically comes as a result of the flame retardant or retardants causing a degradation or even failure of the inter-metallic bond between the bonding wire and at least one of the lead and/or the chip bonding pad.
What is clearly needed therefore, is a methodology which encapsulates electronic devices reliably, thereby ensuring such intimate bonding of the molding compound with the encapsulated IC chip, lead frame components, and bonding wires that JEDEC Level 1 performance can routinely be achieved and maintained. What is further needed is a methodology which precludes the vulnerability of integrated circuit bond wire degradation due to chemical or metallurgical attack. What is further desirable is that the methodology be capable of implementation without recourse to extensive re-tooling or re-engineering of the current electron device encapsulation process or equipment.
A possible solution to each of these problems inherent with current homogenous molding compound technology may reside in the results of an experiment conducted to determine the behavior of discrete molding compounds injected into a single mold. In this experiment, a succession of molding compound pellets having substantially identical chemical compositions, but with different coloring, were inserted into a transfer molding apparatus in the order: white, red, green and black compounds, and injected in one shot. These pellets, of course, replaced the all black pellets previously discussed.
It was expected that the same order of colors in the encapsulated device would be found from the vent back toward the gate, much like layers filling a bathtub. Surprisingly, what was discovered upon sectioning the encapsulated device was that the outer portion of the package was in fact the first color injected, in this case white, followed by a red layer concentric within the white layer, a green layer concentric within the red layer, and the black layer concentric within the green. In other words, the deposition and order of layers of molding compound within a transferred molding apparatus, where the mold is substantially warmer than the IC devices and lead frames enclosed therein, is clearly more a function of the higher temperature and thermal mass of the mold than it is of the physical order in which the molding compound is inserted therein. It is believed that the first molding compound injected into the mold tends to flow towards the elevated temperature and relatively larger thermal mass of the mold in preference to the relatively cool, relatively smaller thermal mass of the IC chip. It is believed that polymerization proceeds most quickly at the warmest points of the assembly, i.e., the mold itself.